Download: Multi-Rail Power Sequencer and Monitor

Why is Power Sequencing Required for FPGAs, ASICs, CPUs, etc?

  • To avoid contention on signals as the board is powered on and off
  • To prevent excessive current draw
  • To prevent latch-up, reduced reliability or damage to devices
  • To address power down sequencing requirements during sudden loss of power, or brownout

Here you can download the new programmable module residing in the MAX FPGA, providing the ability to monitor and correctly sequence power rails for FPGAs, ASICs, and other processors provided as open source design.


  • Sequence and monitor any combination of up to 144 rails
    • Up to 18 voltage-monitored rails per Intel® MAX® 10 device
    • Up to 144 digital-monitored (POK) rails per Intel® MAX® 10 device
  • Monitor overvoltage, undervoltage, and power good status
  • PMBusTM 1.2 compliant slave interface
  • Set defaults and dynamically control levels for overvoltage, undervoltage, and power good with programmable response behavior
  • Easily configurable via Platform Designer GUI
  • Includes simulation testbench